1. Field of the Invention
The present invention relates to a surface-mount crystal oscillator, and particularly relates to a surface-mount crystal oscillator capable of disposing an IC (integrated circuit) chip by positioning the IC chip with high accuracy on an inner bottom surface of a recess provided to house the IC chip.
2. Description of the Related Arts
Surface-mount crystal oscillators each configured by integrating a quartz crystal blank and an IC chip including an oscillating circuit which uses the crystal blank are widely used as reference sources for frequency and time in portable electronic devices represented by portable telephones, for example, because of its compact size and light weight. As such a surface-mount crystal oscillator, there is a two-chamber type crystal oscillator using a container body with recesses formed on both principal surfaces, in which an IC chip is housed in one of the recesses and a crystal blank is hermetically sealed in the other recess, as disclosed in, for example, Japanese Patent Laid-Open Application No. 2000-49560 (JP-A-2000-049560). The two-chamber type crystal oscillator, which has an H-shaped sectional shape, is also called an H-shaped structure type crystal oscillator. Alternatively, there is a bonding-type surface-mount crystal oscillator in which a mounting substrate housing an IC chip is joined to the bottom surface of a quartz crystal unit having the configuration in which a crystal blank is hermetically encapsulated in a container.
FIG. 1A is a sectional view showing an example of the configuration of the conventional two-chamber type surface-mount crystal oscillator. FIG. 1B is a bottom view of a container body in the crystal oscillator, and shows recess 20a provided in container body 1 to house IC chip 2.
The surface-mount crystal oscillator which is illustrated in the drawings includes container body 1 which is formed into a flat rectangular parallelepiped shape with recesses formed on both principal surfaces thereof respectively. Container body 1 is made of laminated ceramics having planer bottom plate 1a in a substantially rectangular shape, and frame wall layers 1b, 1c which are respectively laminated on both the principal surfaces of bottom plate 1a. A substantially rectangular opening is formed in each of frame wall layers 1b, 1c. Recess 20a which accommodates IC chip 2 is formed by the opening of frame wall layer 1b, and recess 20b which accommodates crystal blank 3 is formed by the opening of frame wall layer 1c. The illustrated undersurface of bottom plate 1a is exposed on the bottom surface of recess 20a, and the illustrated top surface of bottom plate 1a is exposed on the bottom surface of recess 20b. 
As shown in FIG. 1B, the inner bottom surface of recess 20a which houses IC chip 2 is in a substantially rectangular shape, six circuit terminals 4a to 4f in total are provided so that three circuit terminals are along each of a pair of longer sides of the rectangle. The circuit terminals are used for electrical connection with IC chip 2 as will be described later. Specifically, circuit terminals 4a to 4f are provided at four corner portions of the inner bottom surfaces of recess 20a, and in a central region of each of the longer sides. Of them, the circuit terminals provided at the four corner portions of recess 20a are, for example, a power supply terminal, an output terminal, a ground terminal and an AFC (automatic frequency control) terminal. Remaining two circuit terminals 4c, 4d are, for example, crystal connection terminals for use in electrical connection of IC chip 2 and crystal blank 3. These circuit terminals are generally indicated by numeral 4 in FIG. 1A.
At four corner portions of an opening end surface of recess 20a of container body 1, specifically, four corner portions of the surface which is the illustrated undersurface of frame wall layer 1b and surrounds recess 20a, external terminals 6a to 6d are provided as terminals for use when the crystal oscillator is mounted on a wiring board so as to be in contact with outer edges of recess 20a at the shorter sides thereof. External terminals 6b to 6d are in the same shapes, but external terminal 6a is formed into a different shape from other external terminals 6b to 6d so as to facilitate positioning when the crystal oscillator is mounted on the wiring board, and discriminate the terminals. In the example shown here, external terminal 6a includes extension 6e extending in a longitudinal direction of container body 1. These external terminals are generally indicated by numeral 6 in FIG. 1B.
External terminals 6a to 6d respectively correspond to circuit terminals 4a to 4d at the four corner portions of the inner bottom surface of recess 20a, and are electrically connected to circuit terminals 4a to 4d by wiring paths 5 respectively. Wiring paths 5 extend from the circuit terminals to the four corner portions of recess 20a, from which, they extend to the positions of vertices of substantially rectangular bottom plate 1a from the circuit terminals via a lamination plane between bottom plate 1a and frame wall layer 1b, and further extend to the external terminals through the side surfaces of frame wall layer 1b on which through-hole processing is applied. The positions where through-hole processing is applied are the positions of the four corner portions in the outer periphery of frame wall layer 1b. 
Circuit terminals 4a to 4f, wiring paths 5 and external terminals 6a to 6d are all provided as electrode layers provided on the surface of the ceramic sheet configuring the laminated ceramics. They are integrally provided with container body 1 when container body 1 is formed by laminating unfired ceramic raw sheets, that is, ceramic green sheets, and firing them. Specifically, underlying electrodes are formed beforehand on the green sheets corresponding to bottom plate 1a and frame wall layer 1b, the green sheets are laminated and fired, and thereafter, gold plating is applied onto the underlying electrodes, whereby the circuit terminals and external terminals are formed. At this time, the exposed parts of wiring paths 5 are also plated with gold. In particular, external terminals 6a to 6d are formed by forming the underlying electrodes to be larger than the external terminals on the planar green sheet, thereafter, providing the opening to be recess 20a in the green sheet by hollowing out the green sheet, and thereafter, performing lamination, firing and plating. Actually, green sheets of each layer of the size corresponding to a plurality of container bodies 1 are laminated and integrally fired, and thereafter, the fired lamination is divided into individual container bodies 1, whereby a plurality of container bodies 1 are manufactured at one time.
In circuit terminals 4a to 4d which are provided at the four corner portions of recess 20a, in order to discriminate the circuit terminals and position IC chip 2 when IC chip 2 is mounted, three circuit terminals 4a to 4c of them are formed into the same shapes, and remaining one circuit terminal 4d as well as wiring path 5 extending from it is formed into a different shape.
In a central region of each of the longer sides of recess 20a of container body 1, arc-shaped notch 7 for resin injection is provided on the inner wall of recess 20a, that is, the inner peripheral surface of the opening of frame wall layer 1b. The dimension of notch 7 is such a dimension as to allow the tip end of a nozzle for resin injection to be inserted between the outer periphery of IC chip 2 and the inner side surface of recess 20a, in the position of notch 7.
IC chip 2 is in a substantially rectangular shape, and is formed by integrating the electronic circuits including the oscillating circuit which uses crystal blank 3 on a semiconductor substrate. The oscillating circuit is formed on one principal surface of the semiconductor substrate by an ordinary semiconductor device fabrication process. Thus, of both the principal surfaces of IC chip 2, the surface on which the oscillating circuit is formed in the semiconductor substrate will be called a circuit formation plane. As shown in FIG. 1C, at four corner portions and central regions of the longer sides of the circuit formation plane, a plurality of IC terminals 13 for connecting IC chip 2 to an external circuit are provided to correspond to circuit terminals 4a to 4f on the inner bottom surface of recess 20a of container body 1. IC terminals 13 include, for example, a power supply terminal, a ground terminal, an oscillation output terminal, an AFC terminal, and a pair of connection terminals electrically connected to crystal blank 3.
IC chip 2 is fixed and electrically connected to the inner bottom surface of recess 20a by the method of flip chip bonding. More specifically, each of IC terminals 13 is secured to the corresponding circuit terminal by ultrasonic thermocompression bonding using bump 8 joined onto each of IC terminals 13, and thereby, IC chip 2 is fixed to container body 1. In this case, in order to position IC chip 2 with respect to recess 20a, the undersurface of container body 1 is imaged by an industrial television camera or the like, the positions of at least three circuit terminals 4a to 4c shown by squares of dashed line in FIG. 1B are discriminated by image recognition, and the IC terminals of IC chip 2 are then positioned in accordance with them. In this case, IC chip 2 is transported by vacuum-sucking the principal surface which is not the circuit formation plane, and is positioned in a predetermined position in recess 20a. In this case, in order to prevent IC chip 2 and circuit terminals 4a to 4f from being positioned in the state in which they are rotated by 180 degrees from the proper mutual positional relation, circuit terminal 4d which differs in shape from circuit terminals 4a to 4c is used. Specifically, at the time of image recognition, circuit terminal 4d is recognized as a different object from circuit terminals 4a to 4c, and is used as the reference for positioning.
Crystal blank 3 is, for example, a substantially rectangular quartz crystal piece of AT-cut. Excitation electrodes 9a are provided respectively on both principal surfaces of crystal blank 3, and lead electrodes 9b are extended from excitation electrodes 9a to both sides of one end portion of crystal blank 3. A pair of crystal holding terminals are provided on the inner bottom surface of other recess 20b of container body 1, and by using conductive adhesive 10 or the like, both sides at one end portion of crystal blank 3 toward which lead electrodes 9b are extended are fixed to the crystal holding terminals. Thereby, crystal blank 3 is electrically and mechanically connected to the crystal holding terminals, and is held in recess 20b. The crystal holding terminals are electrically connected to circuit terminals 4e, 4f which are used as the crystal connection terminals by wiring paths 5 such as via holes (not shown). Accordingly, crystal blank 3 is electrically connected to the oscillating circuit in IC chip 2.
A metal ring (not shown) is provided on a top surface of frame wall layer 1c to surround other recess 20b of container body 1, and metal cover 11 is seam-welded to the metal ring, whereby the opening of recess 20b is closed, and crystal blank 3 is hermetically encapsulated in recess 20b. 
When such a crystal oscillator is manufactured, in general, crystal blank 3 is housed in recess 20b and hermitically encapsulated, and thereafter, IC chip 2 is fixed to the inner bottom surface of recess 20a. The tip end of the nozzle is inserted into notch 7 for resin injection provided in container body 1, and protection resin 12 which is used as underfill is injected into a space between the inner bottom surface of recess 20a and IC chip 2, and a space between the outer side surface of IC chip 2 and the inner side surface of recess 20a so as to protect the circuit formation plane of IC chip 2 from ambient atmosphere.
However, in the above described surface-mount crystal oscillator, when the ceramic green sheets configuring bottom plate 1a and frame wall layers 1b, 1c are laminated to form container body 1, a positional deviation within about 50 micrometers may occur, for example. Since circuit terminals 4a to 4d are formed on bottom plate 1a, if such a positional deviation occurs, the positions of circuit terminals 4a to 4d deviate from the original positions in the same direction as a whole with respect to recess 20a which is defined by frame wall layer 1b. 
When container body 1 including recess 20a is imaged in the state in which such a deviation exists to perform image recognition, and IC chip 2 is mounted in recess 20a, the space between the inner wall of recess 20a and the outer periphery of IC chip 2 does not become uniform and a portion where the space becomes narrow occurs. As a result, IC chip 2 collides with the inner side surface of recess 20a or frame wall layer 1b, whereby IC chip 2 or frame wall layer 1b break, and IC chip 2 is fixed to the inner bottom surface of recess 20a in an inclined state, which brings about reduction in yield and productivity.
Further, when the space between the inner side surface of recess 20a and the outer peripheral surface of IC chip 2 is narrower than the original space, a nozzle cannot be inserted into notch 7 for resin injection, and injection of protection resin 12 becomes difficult. With respect to the portion narrower than the original space, spread of uncured protection resin 12 becomes unfavorable, as the space is narrower. Therefore, even if the nozzle can be inserted, or the configuration which does not require notch is adopted, proper injection of protection resin 12 becomes difficult after all.
The problem described above becomes more remarkable as the planar outer shape of container body 1 becomes small to be, for example, about 2.0 mm×1.6 mm, and productivity of the crystal oscillator reduces correspondingly.
The above described problem is caused by performing image recognition of the circuit terminals and positioning IC chip 2 with respect to recess 20a when a positional deviation exists between bottom plate 1a having the circuit terminals and frame wall layer 1b which defines recess 20a. Thus, it was conceived to perform image recognition of the three corner portions of the opening end surface of recess 20a, that is, the three corner portions of the surface of frame wall layer 1b surrounding recess 20a instead of performing image recognition of the circuit terminals, and position IC chip 2 to correspond to them. More specifically, in these three corner portions, the corners in the outer periphery of recess 20a, that is, vertices where the shorter sides and longer sides of the inner bottom surface formed to be rectangular of recess 20a, are extracted by image recognition and IC chip 2 is positioned so that the space between the three vertices and the outer periphery of IC chip 2 becomes constant. In this case, the positions of circuit terminals 4a to 4f are likely to deviate with respect to IC chip 2, and therefore, circuit terminals 4a to 4f are formed to be rather large beforehand in view of the deviation.
Wiring paths 5 from circuit terminals 4a to 4d to external terminals 6a to 6d extend to the positions which become the vertices of the inner bottom surface of recess 20a, and the external terminals and wiring paths are plated with gold, and are recognized to be the same color in image recognition. Therefore, there arises the problem that it becomes difficult to discriminate the position of the outer periphery of the inner bottom surface in the vicinity of the vertices of the inner bottom surface of recess 20a by image recognition, and therefore, accurate recognition of the positions of the vertices becomes difficult.